電気工学および電子技術ジャーナル

Temperature Dependent Sub threshold Drain Current Model for Junction less Gate all Around MOSFET with High-K Gate Stack

Suman Sharma, Rajni Shukla and M R Tripathy

A temperature dependent sub threshold drain current model for junction less (JL) Gate all around (GAA) MOSFET with high-k Gate Stack is developed in this paper. Poisson’s equation in cylindrical coordinate has been solved using Parabolic Potential Approximation (PPA). The effect of temperature variation from 300-500 K on the sub threshold performance of the JL-GAA MOSFET by varying the gate stack thickness has been obtained using the proposed model. The developed model has also been used to study the Sub threshold- Slop of JL-GAA MOSFET at high ambient temperature. Band-gapnarrowing is also included in the analytical model as the doping concentration is very high. Atlas-3D device simulation tool has been used for the numerical simulations. Developed temperature dependent model for JL-GAA MOSFET with high-k dielectric has close agreement with the simulation results. Developed model is very useful for the device optimization; as the device dimensions reduces in radial direction the oxide thickness reduction becomes necessary and the use of high-k stack as a dielectric is demanded.